1 -- megafunction wizard: %FIFO%
2 -- GENERATION: STANDARD
3 -- VERSION: WM1.0
4 -- MODULE: scfifo
5
6 -- ============================================================
7 -- File Name: fifo16.vhd
8 -- Megafunction Name(s):
9 -- scfifo
10 --
11 -- Simulation Library Files(s):
12 -- altera_mf
13 -- ============================================================
14 -- ************************************************************
15 -- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
16 --
17 -- 13.0.1 Build 232 06/12/2013 SP 1 SJ Web Edition
18 -- ************************************************************
19
20
21 --Copyright (C) 1991-2013 Altera Corporation
22 --Your use of Altera Corporation's design tools, logic functions
23 --and other software and tools, and its AMPP partner logic
24 --functions, and any output files from any of the foregoing
25 --(including device programming or simulation files), and any
26 --associated documentation or information are expressly subject
27 --to the terms and conditions of the Altera Program License
28 --Subscription Agreement, Altera MegaCore Function License
29 --Agreement, or other applicable license agreement, including,
30 --without limitation, that your use is for the sole purpose of
31 --programming logic devices manufactured by Altera and sold by
32 --Altera or its authorized distributors. Please refer to the
33 --applicable agreement for further details.
34
35
36 LIBRARY ieee;
37 USE ieee.std_logic_1164.all;
38
39 LIBRARY altera_mf;
40 USE altera_mf.all;
41
42 ENTITY fifo16 IS
43 PORT
44 (
45 clock : IN STD_LOGIC ;
46 data : IN STD_LOGIC_VECTOR (15 DOWNTO 0);
47 rdreq : IN STD_LOGIC ;
48 wrreq : IN STD_LOGIC ;
49 empty : OUT STD_LOGIC ;
50 full : OUT STD_LOGIC ;
51 q : OUT STD_LOGIC_VECTOR (15 DOWNTO 0)
52 );
53 END fifo16;
54
55
56 ARCHITECTURE SYN OF fifo16 IS
57
58 SIGNAL sub_wire0 : STD_LOGIC ;
59 SIGNAL sub_wire1 : STD_LOGIC ;
60 SIGNAL sub_wire2 : STD_LOGIC_VECTOR (15 DOWNTO 0);
61
62
63
64 COMPONENT scfifo
65 GENERIC (
66 add_ram_output_register : STRING;
67 intended_device_family : STRING;
68 lpm_numwords : NATURAL;
69 lpm_showahead : STRING;
70 lpm_type : STRING;
71 lpm_width : NATURAL;
72 lpm_widthu : NATURAL;
73 overflow_checking : STRING;
74 underflow_checking : STRING;
75 use_eab : STRING
76 );
77 PORT (
78 clock : IN STD_LOGIC ;
79 data : IN STD_LOGIC_VECTOR (15 DOWNTO 0);
80 rdreq : IN STD_LOGIC ;
81 empty : OUT STD_LOGIC ;
82 full : OUT STD_LOGIC ;
83 q : OUT STD_LOGIC_VECTOR (15 DOWNTO 0);
84 wrreq : IN STD_LOGIC
85 );
86 END COMPONENT;
87
88 BEGIN
89 empty <= sub_wire0;
90 full <= sub_wire1;
91 q <= sub_wire2(15 DOWNTO 0);
92
93 scfifo_component : scfifo
94 GENERIC MAP (
95 add_ram_output_register => "OFF",
96 intended_device_family => "Cyclone III",
97 lpm_numwords => 128,
98 lpm_showahead => "OFF",
99 lpm_type => "scfifo",
100 lpm_width => 16,
101 lpm_widthu => 7,
102 overflow_checking => "ON",
103 underflow_checking => "ON",
104 use_eab => "ON"
105 )
106 PORT MAP (
107 clock => clock,
108 data => data,
109 rdreq => rdreq,
110 wrreq => wrreq,
111 empty => sub_wire0,
112 full => sub_wire1,
113 q => sub_wire2
114 );
115
116
117
118 END SYN;
119
120 -- ============================================================
121 -- CNX file retrieval info
122 -- ============================================================
123 -- Retrieval info: PRIVATE: AlmostEmpty NUMERIC "0"
124 -- Retrieval info: PRIVATE: AlmostEmptyThr NUMERIC "-1"
125 -- Retrieval info: PRIVATE: AlmostFull NUMERIC "0"
126 -- Retrieval info: PRIVATE: AlmostFullThr NUMERIC "-1"
127 -- Retrieval info: PRIVATE: CLOCKS_ARE_SYNCHRONIZED NUMERIC "0"
128 -- Retrieval info: PRIVATE: Clock NUMERIC "0"
129 -- Retrieval info: PRIVATE: Depth NUMERIC "128"
130 -- Retrieval info: PRIVATE: Empty NUMERIC "1"
131 -- Retrieval info: PRIVATE: Full NUMERIC "1"
132 -- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
133 -- Retrieval info: PRIVATE: LE_BasedFIFO NUMERIC "0"
134 -- Retrieval info: PRIVATE: LegacyRREQ NUMERIC "1"
135 -- Retrieval info: PRIVATE: MAX_DEPTH_BY_9 NUMERIC "0"
136 -- Retrieval info: PRIVATE: OVERFLOW_CHECKING NUMERIC "0"
137 -- Retrieval info: PRIVATE: Optimize NUMERIC "0"
138 -- Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0"
139 -- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
140 -- Retrieval info: PRIVATE: UNDERFLOW_CHECKING NUMERIC "0"
141 -- Retrieval info: PRIVATE: UsedW NUMERIC "0"
142 -- Retrieval info: PRIVATE: Width NUMERIC "16"
143 -- Retrieval info: PRIVATE: dc_aclr NUMERIC "0"
144 -- Retrieval info: PRIVATE: diff_widths NUMERIC "0"
145 -- Retrieval info: PRIVATE: msb_usedw NUMERIC "0"
146 -- Retrieval info: PRIVATE: output_width NUMERIC "16"
147 -- Retrieval info: PRIVATE: rsEmpty NUMERIC "1"
148 -- Retrieval info: PRIVATE: rsFull NUMERIC "0"
149 -- Retrieval info: PRIVATE: rsUsedW NUMERIC "0"
150 -- Retrieval info: PRIVATE: sc_aclr NUMERIC "0"
151 -- Retrieval info: PRIVATE: sc_sclr NUMERIC "0"
152 -- Retrieval info: PRIVATE: wsEmpty NUMERIC "0"
153 -- Retrieval info: PRIVATE: wsFull NUMERIC "1"
154 -- Retrieval info: PRIVATE: wsUsedW NUMERIC "0"
155 -- Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
156 -- Retrieval info: CONSTANT: ADD_RAM_OUTPUT_REGISTER STRING "OFF"
157 -- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
158 -- Retrieval info: CONSTANT: LPM_NUMWORDS NUMERIC "128"
159 -- Retrieval info: CONSTANT: LPM_SHOWAHEAD STRING "OFF"
160 -- Retrieval info: CONSTANT: LPM_TYPE STRING "scfifo"
161 -- Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "16"
162 -- Retrieval info: CONSTANT: LPM_WIDTHU NUMERIC "7"
163 -- Retrieval info: CONSTANT: OVERFLOW_CHECKING STRING "ON"
164 -- Retrieval info: CONSTANT: UNDERFLOW_CHECKING STRING "ON"
165 -- Retrieval info: CONSTANT: USE_EAB STRING "ON"
166 -- Retrieval info: USED_PORT: clock 0 0 0 0 INPUT NODEFVAL "clock"
167 -- Retrieval info: USED_PORT: data 0 0 16 0 INPUT NODEFVAL "data[15..0]"
168 -- Retrieval info: USED_PORT: empty 0 0 0 0 OUTPUT NODEFVAL "empty"
169 -- Retrieval info: USED_PORT: full 0 0 0 0 OUTPUT NODEFVAL "full"
170 -- Retrieval info: USED_PORT: q 0 0 16 0 OUTPUT NODEFVAL "q[15..0]"
171 -- Retrieval info: USED_PORT: rdreq 0 0 0 0 INPUT NODEFVAL "rdreq"
172 -- Retrieval info: USED_PORT: wrreq 0 0 0 0 INPUT NODEFVAL "wrreq"
173 -- Retrieval info: CONNECT: @clock 0 0 0 0 clock 0 0 0 0
174 -- Retrieval info: CONNECT: @data 0 0 16 0 data 0 0 16 0
175 -- Retrieval info: CONNECT: @rdreq 0 0 0 0 rdreq 0 0 0 0
176 -- Retrieval info: CONNECT: @wrreq 0 0 0 0 wrreq 0 0 0 0
177 -- Retrieval info: CONNECT: empty 0 0 0 0 @empty 0 0 0 0
178 -- Retrieval info: CONNECT: full 0 0 0 0 @full 0 0 0 0
179 -- Retrieval info: CONNECT: q 0 0 16 0 @q 0 0 16 0
180 -- Retrieval info: GEN_FILE: TYPE_NORMAL fifo16.vhd TRUE
181 -- Retrieval info: GEN_FILE: TYPE_NORMAL fifo16.inc FALSE
182 -- Retrieval info: GEN_FILE: TYPE_NORMAL fifo16.cmp TRUE
183 -- Retrieval info: GEN_FILE: TYPE_NORMAL fifo16.bsf FALSE
184 -- Retrieval info: GEN_FILE: TYPE_NORMAL fifo16_inst.vhd TRUE
185 -- Retrieval info: LIB_FILE: altera_mf
186
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