1 -- megafunction wizard: %FIFO%
2 -- GENERATION: STANDARD
3 -- VERSION: WM1.0
4 -- MODULE: dcfifo
5
6 -- ============================================================
7 -- File Name: fifo32.vhd
8 -- Megafunction Name(s):
9 -- dcfifo
10 --
11 -- Simulation Library Files(s):
12 -- altera_mf
13 -- ============================================================
14 -- ************************************************************
15 -- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
16 --
17 -- 13.0.1 Build 232 06/12/2013 SP 1 SJ Web Edition
18 -- ************************************************************
19
20
21 --Copyright (C) 1991-2013 Altera Corporation
22 --Your use of Altera Corporation's design tools, logic functions
23 --and other software and tools, and its AMPP partner logic
24 --functions, and any output files from any of the foregoing
25 --(including device programming or simulation files), and any
26 --associated documentation or information are expressly subject
27 --to the terms and conditions of the Altera Program License
28 --Subscription Agreement, Altera MegaCore Function License
29 --Agreement, or other applicable license agreement, including,
30 --without limitation, that your use is for the sole purpose of
31 --programming logic devices manufactured by Altera and sold by
32 --Altera or its authorized distributors. Please refer to the
33 --applicable agreement for further details.
34
35
36 LIBRARY ieee;
37 USE ieee.std_logic_1164.all;
38
39 LIBRARY altera_mf;
40 USE altera_mf.all;
41
42 ENTITY fifo32 IS
43 PORT
44 (
45 data : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
46 rdclk : IN STD_LOGIC ;
47 rdreq : IN STD_LOGIC ;
48 wrclk : IN STD_LOGIC ;
49 wrreq : IN STD_LOGIC ;
50 q : OUT STD_LOGIC_VECTOR (31 DOWNTO 0);
51 rdempty : OUT STD_LOGIC ;
52 wrfull : OUT STD_LOGIC
53 );
54 END fifo32;
55
56
57 ARCHITECTURE SYN OF fifo32 IS
58
59 SIGNAL sub_wire0 : STD_LOGIC ;
60 SIGNAL sub_wire1 : STD_LOGIC_VECTOR (31 DOWNTO 0);
61 SIGNAL sub_wire2 : STD_LOGIC ;
62
63
64
65 COMPONENT dcfifo
66 GENERIC (
67 intended_device_family : STRING;
68 lpm_numwords : NATURAL;
69 lpm_showahead : STRING;
70 lpm_type : STRING;
71 lpm_width : NATURAL;
72 lpm_widthu : NATURAL;
73 overflow_checking : STRING;
74 rdsync_delaypipe : NATURAL;
75 underflow_checking : STRING;
76 use_eab : STRING;
77 wrsync_delaypipe : NATURAL
78 );
79 PORT (
80 data : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
81 rdclk : IN STD_LOGIC ;
82 rdreq : IN STD_LOGIC ;
83 wrfull : OUT STD_LOGIC ;
84 q : OUT STD_LOGIC_VECTOR (31 DOWNTO 0);
85 rdempty : OUT STD_LOGIC ;
86 wrclk : IN STD_LOGIC ;
87 wrreq : IN STD_LOGIC
88 );
89 END COMPONENT;
90
91 BEGIN
92 wrfull <= sub_wire0;
93 q <= sub_wire1(31 DOWNTO 0);
94 rdempty <= sub_wire2;
95
96 dcfifo_component : dcfifo
97 GENERIC MAP (
98 intended_device_family => "Cyclone III",
99 lpm_numwords => 128,
100 lpm_showahead => "OFF",
101 lpm_type => "dcfifo",
102 lpm_width => 32,
103 lpm_widthu => 7,
104 overflow_checking => "ON",
105 rdsync_delaypipe => 4,
106 underflow_checking => "ON",
107 use_eab => "ON",
108 wrsync_delaypipe => 4
109 )
110 PORT MAP (
111 data => data,
112 rdclk => rdclk,
113 rdreq => rdreq,
114 wrclk => wrclk,
115 wrreq => wrreq,
116 wrfull => sub_wire0,
117 q => sub_wire1,
118 rdempty => sub_wire2
119 );
120
121
122
123 END SYN;
124
125 -- ============================================================
126 -- CNX file retrieval info
127 -- ============================================================
128 -- Retrieval info: PRIVATE: AlmostEmpty NUMERIC "0"
129 -- Retrieval info: PRIVATE: AlmostEmptyThr NUMERIC "-1"
130 -- Retrieval info: PRIVATE: AlmostFull NUMERIC "0"
131 -- Retrieval info: PRIVATE: AlmostFullThr NUMERIC "-1"
132 -- Retrieval info: PRIVATE: CLOCKS_ARE_SYNCHRONIZED NUMERIC "0"
133 -- Retrieval info: PRIVATE: Clock NUMERIC "4"
134 -- Retrieval info: PRIVATE: Depth NUMERIC "128"
135 -- Retrieval info: PRIVATE: Empty NUMERIC "1"
136 -- Retrieval info: PRIVATE: Full NUMERIC "1"
137 -- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
138 -- Retrieval info: PRIVATE: LE_BasedFIFO NUMERIC "0"
139 -- Retrieval info: PRIVATE: LegacyRREQ NUMERIC "1"
140 -- Retrieval info: PRIVATE: MAX_DEPTH_BY_9 NUMERIC "0"
141 -- Retrieval info: PRIVATE: OVERFLOW_CHECKING NUMERIC "0"
142 -- Retrieval info: PRIVATE: Optimize NUMERIC "0"
143 -- Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0"
144 -- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
145 -- Retrieval info: PRIVATE: UNDERFLOW_CHECKING NUMERIC "0"
146 -- Retrieval info: PRIVATE: UsedW NUMERIC "1"
147 -- Retrieval info: PRIVATE: Width NUMERIC "32"
148 -- Retrieval info: PRIVATE: dc_aclr NUMERIC "0"
149 -- Retrieval info: PRIVATE: diff_widths NUMERIC "0"
150 -- Retrieval info: PRIVATE: msb_usedw NUMERIC "0"
151 -- Retrieval info: PRIVATE: output_width NUMERIC "32"
152 -- Retrieval info: PRIVATE: rsEmpty NUMERIC "1"
153 -- Retrieval info: PRIVATE: rsFull NUMERIC "0"
154 -- Retrieval info: PRIVATE: rsUsedW NUMERIC "0"
155 -- Retrieval info: PRIVATE: sc_aclr NUMERIC "0"
156 -- Retrieval info: PRIVATE: sc_sclr NUMERIC "0"
157 -- Retrieval info: PRIVATE: wsEmpty NUMERIC "0"
158 -- Retrieval info: PRIVATE: wsFull NUMERIC "1"
159 -- Retrieval info: PRIVATE: wsUsedW NUMERIC "0"
160 -- Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
161 -- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
162 -- Retrieval info: CONSTANT: LPM_NUMWORDS NUMERIC "128"
163 -- Retrieval info: CONSTANT: LPM_SHOWAHEAD STRING "OFF"
164 -- Retrieval info: CONSTANT: LPM_TYPE STRING "dcfifo"
165 -- Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "32"
166 -- Retrieval info: CONSTANT: LPM_WIDTHU NUMERIC "7"
167 -- Retrieval info: CONSTANT: OVERFLOW_CHECKING STRING "ON"
168 -- Retrieval info: CONSTANT: RDSYNC_DELAYPIPE NUMERIC "4"
169 -- Retrieval info: CONSTANT: UNDERFLOW_CHECKING STRING "ON"
170 -- Retrieval info: CONSTANT: USE_EAB STRING "ON"
171 -- Retrieval info: CONSTANT: WRSYNC_DELAYPIPE NUMERIC "4"
172 -- Retrieval info: USED_PORT: data 0 0 32 0 INPUT NODEFVAL "data[31..0]"
173 -- Retrieval info: USED_PORT: q 0 0 32 0 OUTPUT NODEFVAL "q[31..0]"
174 -- Retrieval info: USED_PORT: rdclk 0 0 0 0 INPUT NODEFVAL "rdclk"
175 -- Retrieval info: USED_PORT: rdempty 0 0 0 0 OUTPUT NODEFVAL "rdempty"
176 -- Retrieval info: USED_PORT: rdreq 0 0 0 0 INPUT NODEFVAL "rdreq"
177 -- Retrieval info: USED_PORT: wrclk 0 0 0 0 INPUT NODEFVAL "wrclk"
178 -- Retrieval info: USED_PORT: wrfull 0 0 0 0 OUTPUT NODEFVAL "wrfull"
179 -- Retrieval info: USED_PORT: wrreq 0 0 0 0 INPUT NODEFVAL "wrreq"
180 -- Retrieval info: CONNECT: @data 0 0 32 0 data 0 0 32 0
181 -- Retrieval info: CONNECT: @rdclk 0 0 0 0 rdclk 0 0 0 0
182 -- Retrieval info: CONNECT: @rdreq 0 0 0 0 rdreq 0 0 0 0
183 -- Retrieval info: CONNECT: @wrclk 0 0 0 0 wrclk 0 0 0 0
184 -- Retrieval info: CONNECT: @wrreq 0 0 0 0 wrreq 0 0 0 0
185 -- Retrieval info: CONNECT: q 0 0 32 0 @q 0 0 32 0
186 -- Retrieval info: CONNECT: rdempty 0 0 0 0 @rdempty 0 0 0 0
187 -- Retrieval info: CONNECT: wrfull 0 0 0 0 @wrfull 0 0 0 0
188 -- Retrieval info: GEN_FILE: TYPE_NORMAL fifo32.vhd TRUE
189 -- Retrieval info: GEN_FILE: TYPE_NORMAL fifo32.inc FALSE
190 -- Retrieval info: GEN_FILE: TYPE_NORMAL fifo32.cmp TRUE
191 -- Retrieval info: GEN_FILE: TYPE_NORMAL fifo32.bsf FALSE
192 -- Retrieval info: GEN_FILE: TYPE_NORMAL fifo32_inst.vhd TRUE
193 -- Retrieval info: LIB_FILE: altera_mf
194
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