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projekte:3cmbeacon:start [2023/01/07 11:22] – [Integrated 10 GHz Beacon Transmitter] thastiprojekte:3cmbeacon:start [2023/01/23 19:42] (aktuell) – [Architecture] thasti
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 {{ :projekte:3cmbeacon:odu_tx_ref.jpg?500|Fully assembled transmitter PCB on temporary heat sink}} {{ :projekte:3cmbeacon:odu_tx_ref.jpg?500|Fully assembled transmitter PCB on temporary heat sink}}
  
-A Silicon Labs Si5342 is used as a crystal-driven reference PLL, which takes care of reference clock jitter cleaning and modulation generation. The high-resolution fractional divider allows synthesizing sub-Hz frequency steps of the output RF carrier, which are required for modern modulation formats. Due to the architecture of the synthesizer, no appreciable fractional spurs are generated in the process, yielding a very clean output spectrum with excellent phase noise. This IC generates in intermediate frequency of about 162 MHz, which is an integer multiplication factor lower than the final RF output frequency. A Linear LTC6948 RF PLL IC is used to multiply this signal by 16, up to a frequency of 2.592 GHz. From this point on, an Analog Devices HMC443 multiplier is used to create the final 10.368 GHz frequency. The multiplication creates some harmonic content at +-N*2.592 GHz away from the carrier, which are suppressed by a Mini-Circuits BFCN-Series MLCC bandpass filter. At this point, the final PA (Analog HMC952A) amplifies the signal up to around 1.5 W before reaching an SMA antenna connector.+A Silicon Labs Si5342 is used as a crystal-driven reference PLL, which takes care of reference clock jitter cleaning and modulation generation. The high-resolution fractional divider allows synthesizing sub-Hz frequency steps of the output RF carrier, which are required for modern modulation formats. Due to the architecture of the synthesizer, no appreciable fractional spurs are generated in the process, yielding a very clean output spectrum with excellent phase noise. This IC generates in intermediate frequency of about 162 MHz, which is an integer multiplication factor lower than the final RF output frequency. A Linear LTC6948 RF PLL IC is used to multiply this signal by 16, up to a frequency of 2.592 GHz. From this point on, an Analog Devices HMC443 multiplier is used to create the final 10.368 GHz frequency. The multiplication creates some harmonic content at +-N*2.592 GHz away from the carrier, which are suppressed by a Mini-Circuits BFCN-Series LTCC bandpass filter. At this point, the final PA (Analog HMC952A) amplifies the signal up to around 1.5 W before reaching an SMA antenna connector.
  
 The HMC952A also has a built-in output RF power detector, which is read out by an on-board controller with integrated ADC. This simplifies the design since no external coupler is required to monitor forward power. The MCU further takes care of reading out the various DC power sensors on the board (to monitor voltages and currents of the SMPSes) and runs the sequencing of the beacon transmitter itself. It (optionally) communicates with a remote device through RS-422 (differential signalling). The HMC952A also has a built-in output RF power detector, which is read out by an on-board controller with integrated ADC. This simplifies the design since no external coupler is required to monitor forward power. The MCU further takes care of reading out the various DC power sensors on the board (to monitor voltages and currents of the SMPSes) and runs the sequencing of the beacon transmitter itself. It (optionally) communicates with a remote device through RS-422 (differential signalling).
projekte/3cmbeacon/start.txt · Zuletzt geändert: 2023/01/23 19:42 von thasti

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